The ARM Cortex processors contain a preload engine that software can use to explicitly load a memory region into the L2 cache. The x86 architecture does not have a corresponding feature, and Freja has no model for it.

If your application does use the preload engine and you want to model the effect of using it when sampling on x86, insert a loop loading the data into the cache using one of the x86 prefetch instruction where the preload engine would otherwise be used. This will give a similar analysis result.