The non-temporal data issue, see Section 8.10, “Non-Temporal Data”, indicates that there is data that is not going to be reused that is taking up space in the cache that could be better used for other things. On x86 processors non-temporal prefetches can be used to tell the processor to completely evict the data from the cache hierarchy once it is evicted from the L1 cache, thus preventing the it from unnecessarily taking up cache space.

PowerPC and ARM processors do not have any instructions that directly correspond to a non-temporal prefetch, but a similar effect can be achieved by using cache line flushes (called clean and invalidate on ARM) to evict the cache lines from the cache once they are no longer needed.

However, accidentally flushing a cache line that will be reused will cause expensive extra cache misses, so cache line flushes have to be used carefully.

Freja reports a non-temporal store issue, see Section 8.9, “Non-Temporal Store Possible”, when piece of code completely overwrites entire cache lines. By using non-temporal stores to write to the cache lines, the application can tell the processor to avoid fetching such lines, avoiding the fetch latency and reducing the memory bandwidth used.

On PowerPC, allocating the cache line in the cache using the dcba or dcbz instructions before overwriting them can be used to achieve a similar effect.